1. Field of the Invention
The present invention relates generally to a semiconductor memory device and, more particularly, to a data output buffer and a semiconductor device having the same. This application claims priority from Korean Patent Application No. 10-2005-0027878 filed on 4 Apr. 2005, the entirety of which is hereby incorporated herein for all purposes as if fully set forth herein.
2. Description of the Related Art
A data output buffer outputs data from the inside of a chip to the outside of the chip. Commonly, only the output terminal of the data output buffer is referred to as a “data output driver.” As the operational speed of a semiconductor memory device increases, the data output buffer operates in a corresponding operating mode.
In general, the data output modes of a semiconductor memory device may be classified into a normal output mode and an Extended Data Out (EDO) mode. The normal output mode, as shown in FIG. 1, is an operating mode that outputs data from a buffer input line IDIO inside a chip to a buffer output line EDIO outside the chip in response to a reference control signal RCON. In the normal output mode, the provision of data from the inside of a chip to the outside of the chip starts in response to the leading edge of a reference control signal RCON. In contrast, the provision of data from the inside of the chip to the outside of the chip is blocked in response to the lagging edge of the reference control signal DCON. Accordingly, the normal output mode is advantageous in that, while the provision of data to the outside of the chip is being blocked, the buffer output line EDIO can be pre-charged or used for other purposes. Meanwhile, the normal output mode can be effectively used in the case where the operating period of the semiconductor memory device is relatively long (that is, the case of a low-frequency operating mode).
In contrast, the EDO mode, as shown in FIG. 2, is an operating mode that provides data from the buffer input line IDIO inside the chip to the buffer output line EDIO outside the chip regardless of the state of the reference control signal RCON. That is, in the EDO mode, as soon as data are received from the buffer input line IDIO inside the chip, the data are provided to the buffer output line EDIO. This EDO mode can be effectively used in the case where the operating period of the semiconductor memory device is relatively short (that is, the case of a high-frequency operating mode).
FIG. 3 is a block diagram showing a conventional data output buffer. In the data output buffer of FIG. 3, an operating mode is determined by an additionally provided mode selection signal MSEL. Accordingly, the conventional data output buffer has a problem in that it requires a structure for receiving the mode selection signal MSEL and for switching its operating based on the mode selection signal MSEL, so that the construction of a related circuit is complicated. Furthermore, in a semiconductor memory device containing the conventional data output buffer shown in FIG. 3, a separate circuit for generating the mode selection signal MSEL is required.
Accordingly, it would be desirable to provide a data output buffer whose operating mode can be controlled without a separate mode selection signal. It would also be desirable to provide a semiconductor memory device including such a data output buffer.